The aim of this project was to research, develop, and characterise a beam splitter circuit to allow another channel on a cathode ray oscilloscope. The required specifications of this beam splitter were:
Two methods were suggested for the implementation of this system.
The first is alternate mode, where one input is connected to the CRO for one complete scan, then the other input is connected for the next cycle, and so on, alternately.
The second is chopped mode, where a switch operates at a higher frequency than the timebase so that each input signal is connected to the CRO for a number of short intervals during beam scan.
The second method was used, as the first is only useful for extremely high frequencies way beyond the top limit (1MHz) of the range of frequencies that the function generators used to generate the test signals, where the time base used would be so short as to show the chopping.
Based on the brief, a first approximation of the circuit's design was drawn out, as shown in figure 1. This design was made based on previous experience with electronics.
Research then uncovered three reasonably simple circuits, one for each module in the original circuit design. Note that the exact workings for each component in the circuit can be found in any standard text book [1].
Note. The numbers on the wires connected to the integrated circuits on the diagrams below refer to the pin numbers.
The most important part of the circuit is the bilateral switch. This is a component which lets an analogue signal pass between two pins depending on the voltage difference between a control pin and the earth. This is similar to a transistor, but for relatively high voltage analogue signals as opposed to TTL signals.
As shown in figure 2, we used a 4016B CMOS Bilateral Switch, since that was what was recommended in the brief. This provides a pass-through resistance of 300 Ohms for the analogue signals [1].
The 10k Ohm resistor on the outputs provides an output impedance to the CMOS, which is required for good power transfer. (It was also the recommended resistance on the circuit found in research.)
For the most effective signal chopping, the bilateral switch must allow only one input to pass through at any one time, otherwise the waves will add on the CRO. This has to happen periodically; if overall one input is let through for a longer time than the other then the former wave will appear brighter. A periodic square wave was therefore used.
The two inputs must be triggered with the same frequency but the polarity of the control inputs must be opposite, so that as one signal passes through, the other is not. Since the control inputs can be triggered using TTL voltages, a NOT gate can be used to ensure that the two control voltages are always of opposite polarity (5V vs 0V in this case). This means that the square wave has to be generated in the range 0V to 5V.
Note that the slight response delay of the NOT gate can cause some problems. This is discussed in the limitations section (section 4).
As with the bilateral switch, circuits for a timer and NOT gate were found after some research [1]. These are shown in figures 3 and 4.
A frequency (f) of 50kHz was used since that allowed the workings of the circuit to be clearly seen on the CRO, for analysis purposes. This value is also the value recommended in the brief.
To set the frequency of the 555 timer, the resistor between the TRIGGER and OUTPUT pins, Rt, and the capacitor between the THRESHOLD pin and earth, Ct, were selected using equation 1 and a recommendation that Ct be set to a value close to 10nF [1].
Thus a value of Rt of 1.5 k Ohm was selected, as shown in figure 3.
Note that the RESET pin on the 555 is kept high at all times. This is because the 555 timer will reset when the RESET input goes low (0V).
The final piece of the overall circuit is the DC offset module. Research proposed that an operational adder (a circuit built around an operational amplifier such as the 741) would be an adequate circuit to use [1]. The standard circuit was slightly modified to include a pair of variable resistors of wide range (0-1M Ohm) which allowed the exact voltage to add to the input to be selected without explicitly changing the power supply.
Using the variable resistors as shown in figure 5, it is possible to offset the signal by -7.5V to +7.5V. Those values were selected since -7.5V and +7.5V rails were already available on the circuit board, and that range is beyond the abilities of the bilateral switch to cope with and so does not limit the offset feature's range.
The resistances for this circuit are set by equation 2.
Given that an adder is what is wanted, vout = V1 + V2 by definition. Thus it follows that RF = R1 = R2. A value of 150k Ohm was selected and found to be suitable, and was also used for Rx.
Test signals came from a pair of wave function generators, but could of course come from any analogue signal source within the range of voltages described in the profile section (section 2). Indeed, to produce one of the output charts (figure 9) a total of 6 separate wave function generators were used simultaneously.
The completed circuit was then tested to find the input voltage range and the frequencies it could handle.
A closer study should probably have been made, but each examination ran the risk of frying the CMOS so it was felt wiser not to pursue this too enthusiastically.
For working operation, it was found that VDD could not be set to +7.5V. VSS and VDD had to be set to -7.5V and 9.0V respectively.
Setting VDD below 9V caused the waves to add instead of chop. Conversely, increasing VDD to above +14.0V caused the signal to die out altogether (the CMOS was probably saturating).
Setting VSS to a voltage more negative than -8V also caused the waves to add.
It would appear that the actual rule is that VDD-VSS must be in the range 16V - 24V for the 4016B to perform to specifications.
With the input waves at 9V peak to peak, the CMOS was found to have to require a 17V to 37V difference between VDD and VSS for the waves to reliably chop.
Surprisingly, considering the warnings regarding the expected range of frequencies given in the brief, the beam splitter circuit was found to work perfectly with input signals with frequencies up to approximately 100kHz, twice the frequency of the timer. Above this frequency the chopping continued to work, but less than 100% of the amplitude of the input waves was transmitted, probably due to a deficiency in the frequency response of the 4016B.
With the use of a graphical printer CRO [2], permanent records of some of the results were obtained.
Careful study of figure 6 shows how the two waves are never shown simultaneously: at every position along the time (horizontal) axis, if one signal is being displayed, the other is cut. This is because only one signal is actually being shown on the CRO at all -- what looks like two waves is in fact a single wave, chopped at regular intervals between the two inputs to the beam splitter.
Figure 8 shows the chopped mode operation in more detail. Here, the "connect-the-dots" mode has been enabled on the CRO, and for approximately half of the time, a triangular wave signal is displayed, and for the other half of the time, a sinusoidal signal (of approximately 4 times the wavelength) is shown.
In figure 7, a DC offset has been applied to the signal from channel 2, a triangular wave, thus moving it below the section of the output which represents channel 1.
This allows the two waves to be compared and measured separately, without having to be very careful about not reading the wrong amplitude or wavelength. Without a DC offset, this would be an especially difficult issue if the waves are of similar shapes (e.g., both sinusoidal) and of similar amplitudes and wavelengths.
The blackness comes from the lines between the signals, as in figure 8, being very close together. When "connect-the-dots" mode is disabled, the CRO appears to display two completely separate signals, even though only one cable was connected to the oscilloscope at the time.
Using two beam splitter circuits in parallel, each splitting two inputs into a single output, and then connecting these two outputs to the two inputs on the CRO, one can display four simultaneous waves on a single screen. Figure 9 demonstrates this.
The output from the 555 timer proved to be slightly "dirtier" than could have been hoped. The negative output (discharge output) of the timer, in particular, contained many spikes and other imperfections. The NOT gate's output did not contain many of these imperfections and that is one reason that the NOT gate was used, together with the main timer output, rather than just using the two outputs of the 555.
However, use of a NOT gate introduces some problems of its own, in particular the propagation delay which can result in the two waves adding for a short time instead of being displayed sequentially. This can cause spurious dots (in dot mode) or lines (in "connect-the-dots" mode) on the CRO display.
At the frequency used (50kHz) this is not a noticeable problem. It would probably become considerably more noticeable at higher timer frequencies.
A circuit was designed to chop two analogue signals using a 4016B CMOS bilateral switch and a 555 timer so that they can be displayed simultaneously on a CRO while using only a single input. An operational adder is also used to add DC-offset options to the system.
This circuit was found to work reliably with input signals of up to 9V pk-pk, and frequencies of up to 100kHz. Using two identical circuits, four separate waveforms are displayed on a single, two channel CRO.
My lab partner, Tim Wilkins, proved to be exceptionally competent at wiring circuits, and the success of this project can be largely attributed to this ability.
Mike Westmuckett and Phil Waring allowed us to temporarily steal their version of the beam splitter in order to generate figure 9.
Mike Harriman was once again very helpful in finding and providing us with all the equipment for which we asked.